Monthly Salary: $7,000 - $14,000 + AWS + VB

- Full Time Position
- Ubi
- $7,000 - $14,000 + AWS + VB
- Mon - Fri, 9am - 6pm

• Responsible for all the aspects of the ASIC front end design, including the micro- architecture, RTL, synthesis, logic and timing verification.
• Document, execute the plan, and deliver fully verified, high performance, area and power efficient design to achieve the targets and specifications.
• Work with the verification team, guide and review the verification plan.
• Participate in post silicon bring-up and validation.

• Mon - Fri, 9am - 6pm

• Permanent

• Ubi

• 2~10 years of complex high-speed digital IC design experience with all stages in the ASIC design flow, DFT, Synthesis, timing analysis, ECO, bring up & lab debug.
• Bachelor’...