Job Overview

We are looking to hire a strong DV engineer to work on verification of LPDDR5/DDR based IPs and Subsystems in the Infra IP team

Create DV infrastructure for verification
Integrate VIP's
Create and execute test plans, debug failures, write assertions, close code and functional coverage
Ensure high quality verification
Working with all stakeholders to ensure program success

Minimum Qualifications

Bachelor's degree in Engineering, Electronics, Information Systems, Computer Science, or related field.

10+ years Design Verification experience or related work experience.

Preferred Qualifications

Following skill set is required:

Strong Debug, UVM, System Verilog
Understanding Specs and Standards and developing relevant test plans
Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and reso...