Brightecs Innovation Pte Ltd in Singapore seeks an experienced engineer for advanced CMOS PLL architecture definition and verification. The role includes lead layout implementation and achieving industry-leading performance metrics in noise and jitter.

Ideal candidates will have a Bachelor’s or higher in Electronic Engineering, with over 8 years in the semiconductor industry and expertise in RF/mixed-signal lab equipment. Proficiency in Python and MATLAB for data analytics is required.

Join us to work on cutting-edge semiconductor technologies and make a significant impact in a dynamic team environment.