The SiC Yield Enhancement Senior Engineer is responsible for improving SiC manufacturing yield, solving process and defect issues, and supporting stable production ramp-up. The role requires hands-on analysis, cross-functional teamwork, and strong technical understanding of semiconductor processes.
Key Responsibilities:
Analyze SiC yield data, identify root causes, and drive corrective actions. Conduct DOE, engineering experiments, and statistical evaluations to improve process robustness. Resolve defect, leakage, and EOS-related issues with failure analysis support. Collaborate closely with Device, UPD, Equipment, QA, and Manufacturing to implement process improvements. Support customer quality requirements by reducing process risks and preparing audit-related documentation. Utilize JMP/MINITAB and fab data to monitor performance and drive data-based decisions. Required Qualifications:
Bac...