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🥝 SR/PRINCIPAL ENGINEER, FE CPIE RAM QUALITY and OPNS ENGINEERING
Dormont Manufacturing Co | singapore, Singapore | Posted June 29, 2026
Job Description
Responsibilities and Tasks: - Establish strategy, models and systems to improve wafer at risk reduction for RAM Defense line hardening.
- Establish strategy, model and systems to improve RAM quality control and reduce defect OOC% variation.
- Establish strategy, model and systems to improve RAM operation efficiency to achieve labor productivity improvement, Cycle time performance, tool utilization performance for lower cost.
- Establish and improve BKM (Best Known Method) related to RAM defense line hardening and operation efficiency.
- Ensure BKM sharing spans across all sites regardless of technology and/or site mission differences.
- Implement abnormal analysis and improvement.
- Lead Copy Smart Team (CST), facilitate taskforce discussion and drive RAM network alignment on strategy business process and roadmap to achieve area objectives and deliver totimelines/commitments.
- Support and performs audit and establi...