Singapore, Singapore | Posted on 12/17/2024

• PerformdetailedSTAon digital designs used in networking and audiosolutions at various stages of the IC design flow (pre-layout,post-layout).
  
• Identify, analyze, andresolve timing violations in critical paths, ensuring low latency and highthroughput for networking and audio processing applications.
  
• Conduct multi-mode,multi-corner (MMMC) analysis to ensure timing closure under differentoperating conditions, including power-saving modes.
  
• Develop, validate, andoptimize timing constraints tailored for high-speed networking interfacesand high-fidelity audio processing circuits.
  
• Define and validateclock definitions, I/O constraints, multi-cycle paths, and false paths,ensuring robust performance in real-world applications.
  
• Work closely with thePhysical Design team to address timing issues, suggest optimizations, andsupport clock distribution for complex networking and audio pro...